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Timing Diagram

Published on Jun 18 2014 // Timing Diagram


Timing Diagram is a graphical representation. It represents the execution time taken by each instruction in a graphical format. The execution time is represented in T-states.

Instruction Cycle:

The time required to execute an instruction is called instruction cycle.

Machine Cycle:

The time required to access the memory or input/output devices is called machine cycle.

T-State:

  • The machine cycle and instruction cycle takes multiple clock periods.
  • A portion of an operation carried out in one system clock period is called as T-state.

MACHINE CYCLES OF 8085:

The 8085 microprocessor has 5 (seven) basic machine cycles. They are

  1. Opcode fetch cycle (4T)
  2. Memory read cycle (3 T)
  3. Memory write cycle (3 T)
  4. I/O read cycle (3 T)
  5. I/O write cycle (3 T)

  • Each instruction of the 8085 processor consists of one to five machine cycles, i.e., when the 8085 processor executes an instruction, it will execute some of the machine cycles in a specific order.
  • The processor takes a definite time to execute the machine cycles. The time taken by the processor to execute a machine cycle is expressed in T-states.
  • One T-state is equal to the time period of the internal clock signal of the processor.
  • The T-state starts at the falling edge of a clock.

Timing Diagram of Machine cycles…(Contd) – >>Page2