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The principle of USB interface chip FT245AM1 circuit

Published on Oct 28 2010 // Micrcontroller circuits

The principle of USB interface chip FT245AM1

The principle of USB interface chip FT245AM2

The principle of USB interface chip FT245AM3

  Abstract:This paper introduces a USB bus interface chip FT245AM in aviation ARINC429 Bus Analyzer application method, while the internal structure introduced FT245AM, pin description, and the interface with the microprocessor circuit, gives the air ARINC429 bus The overall block diagram of the tester, some principles and interface logic simulation of Verilog HDL source code and timing.
    Even with the wide range of computers, ways to communicate with the computer more and more of the communication speed and ease of use requirements are also increasing, which makes the USB communication becomes more and more prominent, more and more extensive applications . Therefore, in the mouse, keyboard, joystick, data acquisition cards, digital cameras, handheld computers have a USB application.
FT245AM the United States produced an FTDI USB-specific chips. It has a strong functions, small size, transmission speed, in line with USB1.1 specification, a microprocessor interface so easy, so much users. The author has successfully developed using FT245AM Aviation ARINC429 Bus Analyzer.

    FT245AM integrated USB1.1 communication protocol and peripheral interfaces, you can easily implement USB host and peripheral MCU, CPLD interface, its data transfer rate up to 1MB / s. FT245AM internal 128 byte receive FIFO and 384 byte transmit FIFO greatly enhanced USB host and peripheral communication quality. In addition, FT245AM also the LDO regulator with 3.3V, 8-bit frequency, USB data clock recovery PLL, USB data transceiver, and interface logic unit can be an external EEPROM serial memory 93C46, to achieve the USB VID, PID, serial number and Description of the string storage device. Use FT245AM greatly simplify the external circuit, so that the user devices become more compact.    When the peripheral from the USB host to read data FT245AM, if FT245AM RXF pin high, then the USB host FT245AM not received the data sent, this time the external MCU (CPLD) can not read the data. When the MCU (CPLD) detected RXF low, that FT245AM already receive FIFO USB host sends data, then the external MCU (CPLD) can read data through the peripheral data bus. Peripherals through the USB host to read data FT245AM timing diagram shown in Figure 2.    2.2 EPM7128S the interface with the FT245AM
1 FT245AM Introduction
1.1 FT245AM internal structure and the pin function
FT245AM the internal structure of the chip shown in Figure 1. The chip QFP32 package, its pins as follows:
USBDP (7 foot): USB differential data positive terminal;
EEDATA (2 feet): Serial memory data;
USBDM (8 foot): USB differential data minus end;
TEST (5 feet): Manufacturer Test pin;
3V3OUT (6 pin): 3.3V power output;
D [7:0] (25 ~ 18 feet): peripheral interface data bus;
XTIN (27 feet): crystal oscillator input;
RD (16 feet): peripheral read data signal input;
XTOUT (28 feet): crystal oscillator output;
WR (15 feet): Peripheral write data signal input;
RCCLK (31 feet): RC Timer;
TXE (14 feet): Send the output FIFO empty flag;
RESET (4 feet): Chip reset input;
RXF (12 feet): Receive FIFO is not empty flag output;
EECS (32 feet): serial memory chip select;
EEREQ (11 feet): serial memory read request;
EESK (1 foot): Serial memory clock;
EEGNT (10 feet): Allow serial memory read;
VCC, AVCC (3,13,26,30 feet): respectively, the chip power supply and circuit simulation;
GND, AGND (9,19,29 feet): chips and analog ground.
1.2 FT246AM method of data transmission and peripheral
FT245AM with a peripheral interface control unit, you can easily and MCU, CPLD interface for data exchange.

When writing data to the peripheral through the USB host FT245AM, if FT245AM TXE pin is high, then FT245AM is busy inside, the external MCU (CPLD) can not transmit FIFO to FT245AM write data. When the external MCU (CPLD) detected TXE is low, it indicates that the sending FIFO FT245AM idle, the external MCU (CPLD) can write data to the FT245AM USB host. Figure 3 shows the peripheral through the USB host FT245AM send data to the timing diagram.
2 Application of ARINC429 Bus Analyzer
ARINC429 bus in the aviation field has widely used, the bus uses differential data transmission to support two transmission rate of 12.5kbps and 100kbps. ARINC429 bus equipment as are special applications, requiring high reliability, while its test equipment is also very important. In order to facilitate the bus equipment testing, special test equipment is not out of the flexibility needed a convenient way to achieve communication with the computer device interconnection bus, so that the bus device can be tested at the computer automatically, so test equipment to provide the flexibility and versatility. Therefore, based on the USB bus presented ARINC429 Bus Analyzer.
2.1 USB-based structure of ARINC429 Bus Analyzer
Consideration to the USB bus is self-powered test, 500mA maximum drive current, so the tester selected ARINC429 4 reception, 2 to send the structure. Of course, if you allow external power supply, you can also send and receive large ones to achieve more, but this will reduce the convenience of USB bus. As ARINC429 bus maximum transmission rate of 100kbps, and USB1.1 communication capacity of up to 12Mbps. , Taking into account the protocol overhead, all the way to complete the 2-way USB bus while the bus ARINC429 sending and receiving 4.
ARINC429 Bus Analyzer to improve real-time, optional high-speed USB interface chip MCU control FT245AM, but not enough MCU I / O number, can not meet ARINC429 control chip connected with the I / O pins, therefore, can choose to CPLDEPM7128S complete FT245AM control and data transfer.
USB-based ARINC429 Bus Analyzer in Figure 4. Figure 5 shows part of the external circuit is FT245AM.
Circuit tester in brag, EPM7128S ARINC429 bus control chip to complete with the USB controller chip FT245AM DEI1016 the logic of transformation, so that the USB host can send data to real-time ARINC429 bus equipment, and real-time receiving device to return the data for the host records of test software and testing equipment failure to meet the need of diagnosis and localization.

EPM7128S and FT245AM complete interface circuit mainly from FT245AM receive FIFO read data and transmit FIFO to FT245AM write data. Pure hardware implementations can FT245AM interface delay and the communication link tester delay to a minimum.
EPM7128S share work with FT245AM clock, it uses 12 I / O and FT245AM connected, corresponding to FT245AM the D0 ~ D7, TXE, RXF, RD, WR and so on.
VerilogHDL of EPM7128S programming language can be used, and using Synplify synthesis, the last use of MAXPlus II for routing and simulation. Interface Design and FT245AM code:
/ / Read signal generated FT245AM
always @ (posedge clk or negedge reset)
if (reset = = 1’b0)
usb_rd <= 1’b1;
else if (usb_rxf = = 1’b1)
usb_rd <= 1’b1;
else if (usb_rd = = 1’b0)
usb_rd <= 1’b1;
else if ((usb_rxf = = 1’b0) & & (usb_rden = = 1’b1) & & (cnt = = 2’d0))
usb_rd <= ~ usb_rd;
/ / Counter, read and write timing control FT245AM
always @ (posedge clk or negedge reset)
if (reset = = 1’b0)
cnt <= 2’d0;
else if (cnt! = 2’d0)
cnt <= cnt +1′ b1;
else if ((usb_txe = = 1’b0) & & (data_valid = = 1’b1) & & (usb_rden = = 1’b0))
ent <= cnt +1′ b1;
/ / Write signal generating FT245AM
always @ (posedge clk or negedge reset)
if (reset = = 1’b0)
usb_wr <= 1’b0;
usb_wr <= (cnt = = 2’d1);
/ / Read data in USB host
always @ (posedge clk or negedge reset)
if (reset = = 1’b0)
rx_data <= 8’b00;
else if (usb_rd = = 1’b0)
rxdata <= usb_data;
/ / Write data to the USB host
always @ (posedge clk or negedge reset)
if (reset = = 1’b0)
tx_data <= 8’h00;
else if (cnt [0] = = 1’b1) tx_data <= data_429;
/ / FT245Amgn EPM7128S data tri-state interfaces
assign usb_data = (cnt [1] = = 1’b1)? tx_data: 8’hzz;
Figure 5 FT245AM external circuit Click to enlarge

3 Conclusion
This article describes the USB interface chip FT245AM principle and in the air ARINC429 Bus Analyzer specific application instance method. I will EPM7128 and FT245AM the interface logic in MAXplus II environment was simulated, the results show that: the use of the design fully meet the actual requirement, therefore, the use of USB communication interface of the air ARINC429 Bus Analyzer, which greatly facilitated the 429 bus equipment and computer communication, effectively improve the detection efficiency of 429 bus devices.