Abstract: This paper introduces the basic functions of PSD3XX chips and ADMC401 chip features, combined with a detailed analysis of the hardware circuit design of the interface between the two, and the software environment and the need to pay attention to issues of note, the last place to static var as an example, introduced ADMC401 + PSD311 two system applications, and gives the system’s hardware structure.: With the wide application of computer control technology and control system complexity and real-time requirements of continuous improvement, a lot of control systems for high-speed, multifunction, large-capacity controllers charged with control of the object demands put forward. Especially in industrial applications, the system needs to quickly complete large amounts of data acquisition and processing as well as receive and transmit control signals, and many other functions, so difficult to meet the general requirements of SCM systems. Therefore, how to design a practical, economical and rational design of high-performance control systems have become critical.
1 PSD Chip Description
For a SCM system, if we adopt the conventional RAM, ROM and logic separation system connection, will make the whole control circuit too numerous to bring to the design and debugging very difficult, but also reduce the stability of the system . The United States produced WSI Programmable Peripheral logic chip integrated PSD series EPROM, SRAM, and PLD array and other components, it will need more external microcontroller chips in a single chip, thus greatly simplifying the hardware circuit designed to reduce the printed circuit board area, shorten the development cycle. Figure 1 is a series of devices PSD3 composition.
Can be seen from the figure inside PSD3XX 256k to 1M bits ranging bit EPROM, they were evenly divided into 8 equally sized regions, each region has its corresponding selection signal decoding part by PSD in the PLD can be generating corresponding selection signals. There are some key features, such as multiple individually configurable I / O ports, two programmable arrays (PAD A and PAD B), 16k bit static RAM, etc.. For larger systems, but also by the level of the cascade (to increase the bus width for the feature) or vertical cascade (to increase the depth characteristics of subsystems), etc. and configure multiple PSD3XX to complete. PSD3XX multiplexed or non-multiplexed bus can be 16-bit micro-controller interface. And supports a variety of MCU, such as Intel’s 80196,80386 EX, Motorola’s 68HC16, 683XX, Philips’s 80C51XA and AD’s ADSP2105 and so on. Such a large storage space and functional unit which greatly facilitates the design of embedded microcontroller, and to provide users with a more simple and flexible solution. Figure 2 is a conventional microcontroller system and a system composed by the PSD compared to the hardware structure diagram, showing the use of PSD, the system structure has been greatly simplified.
Figure Conventional SCM systems, and by the PSD system composed of two comparison chart Click to enlarge
2 ADMC401 Chip Description
For system designers, digital signal processing (DSP) is becoming widespread use of a trend. ADMC401 ? 1 ? ? 2 ? chip is a single-chip DSP-based controller, suitable for industrial applications in high-performance control. The chip integrates a 26MIPS fixed core ADSP-2171, the coding and ADSP-21xx DSP family is fully compatible. The core has a comprehensive set of peripheral control interface, you can quickly realize a highly integrated environment, control of components. In addition, it contains three computational units, two data address generators and a program sequencer, which contains a calculation unit arithmetic logic unit ALU, a multiply / accumulator ? MAC ? and a barrel shifter, and The kernel also increases the bit operation, square, rounded and global interrupt masking and other instructions. In addition, ADMC401 chip also includes two flexible double-buffer and two-way synchronous serial port. Figure 3 shows the functional block diagram of ADMC401. Can be seen from the figure: the chip provides a k × 24-bit internal program memory RAM, 2k × 24-bit internal program memory ROM, 1k × 16-bit internal data memory RAM, a high-performance 8-channel 12-bit mode digital converter ADC system (it after 4 input dual channel simultaneous sampling), a centrosymmetric three-phase 16-bit PWM generator (to produce high accuracy with minimal overhead PWM signal), an incremental encoder interface unit, 2 available FM auxiliary PWM outputs, 12 I / O digital signal line, a dual-channel event capture system, a 16-bit watchdog timer and two 16-bit internal timer and so on.
Program and data RAM can be loaded through the serial port boot program, internal program and data RAM is also available from the external device via the address bus and data bus into the boot process. In addition, ADMC401 DSP core chip can also take advantage of the address and data bus, while adding an important external memory and peripheral expansion capabilities, thus expanding the external program memory and data memory capacity, and makes the DSP core can be addressed to the 14k × 24-bit external program memory and 13k × 16-bit external data memory, so its easy interface with the PSD.
Figure -chip digital signal processing (DSP) device ADMC401 functional block diagram Click to enlarge
3 ADMC401 Interface Design and PSD311
As PSD3XX provides a number of applications within the system all the components needed and the “periphery”, which makes the design of two computer systems possible. For 8051,80196 and 68HC11 microcontrollers, etc., compatible with the PSD is extremely convenient. Similarly, for the provision of a foreign expansion process, the data storage space ADMC401, the PSD can also match. Taking into account the system cost, recommended PSD chip PSD311 (existing product lowest price).
ADMC401 chip boot program loaded pin MMAP and BMODE by the various states to complete, if the pin MMAP and BMODE the applied voltage is “0”, then ADMC401 will work in the so-called EPROM bootloader mode, which known as the “lead memory” dedicated external storage space will allow the chip and byte-wide EPROM connected, and when the power load from the external memory interface through the program; and if the pin MMAP and BMODE set for other potential, then will produce different boot mode. In addition, ADME401 chip and a dedicated active-low signal BMS (Boot Memory Select, the boot memory options), can be used to simplify the boot memory interface. These features greatly facilitate the ADMC401 and the PSD of the interface design. Figure 4 shows the interface circuit ADMC401 and PSD311 (The figure also includes some other peripheral.)
Figure ADMC401-PSD311 interface circuit diagram Click to enlarge
The figure shows, ADMC401 connection with the PSD311 it almost as easy as connecting a standard EPROM. As the bus inside the channel cloth in ADMC401, therefore, PSD311 the eight data lines are not as common and ADMC401 the D7 ~ D0 connected, but connected with the D15 ~ D8. Also note that the highest address is provided ADMC401 the D22 line (not in the A14 address line ADMC401). The BMS signal can be used for EPROM’s chip select input and is connected with the PSD311 the A19, A19 in the PSD program will be defined as the chip enable signal generated by the ADMC401 strobe active-low read and write, they usually correspond to PSD311 the RD and WR inputs connected to the strobe can be used in the transmission strobe PSD311 in the EPROM and RAM.
ADMC401 a 2k × 24 bit internal program memory space. The use of EPROM bootloader mode (MMAP = 0, BMODE = 0), external programs can ADMC401 internal sequencer in accordance with its own 24-bit command format all at once downloaded to its internal program memory space. Of course, the application may be greater than ADMC401 internal program memory space. However, no need to worry, the program code if the execution to the back, ADMC401 will automatically reboot. Guided by the eight composed of program memory, 8k bytes per page. In addition to the first byte of an addition, every three bytes of a null byte, first byte is the length of the page, in the space of two adjacent bytes in groups of three bytes contain a DSP internal program memory to load the 24-bit instructions, that is, 2k × 24 bit internal program memory space requires 8k × 8-bit external memory space. Development tools in the ADMC401, there is a PROM program memory allocator utility “SPL21.exe” user program can calculate the correct page length, and the agreement under the appropriate sort of bytes user program, which greatly facilitate the generation of program code, the code can be written PSD311. PSD311 different specific circuit configuration, or visit www.waferscale.com site for details.
Note that, ADMC401 debugging the assembly language source program in assembly language editing is complete, the assembly should also be provided by ADMC401, linker ASM21.exe and LD21.exe ? compiled in order to ultimately generate a connection “. Exe” file . The executable file is transferred to the ADMC401 software debug executive. The PSD311 PSD software mainly for logic circuits, I / O channels and storage space allocation for editing, the resulting file will ADMC401 generated code is written to the PSD311 in together.
Figure SVG device structure Click to enlarge
4 SVG Device
SVG (Static Var Generator) – SVG is also known as STATCOM (Static Synchronous Compensator), is a flexible AC transmission systems FACTS (Flexible AC Transmis-sion System) technology is an important basis for parts. The parts with other than reactive power compensation devices, although the higher cost of SVG device, but its flexible dynamic adjustment features, excellent compensation effect and smaller equipment size are other devices can not be compared. In the SVG device, due to the large number of complex calculations involved (such as filtering computation, the instantaneous reactive power calculations) and various controls (such as vector control, PI control) and many signal acquisition and transmission. Therefore, the system operation speed of the controller, interface resources, stability and cost, and so demanding. SVG is a key component devices that part of the inverter bridge, and ADMC401 integrated 6-channel PWM waveform generator dedicated just to provide a flexible control method. In addition, ADMC401 8 high-speed pipelined A / D sampling ports for fast acquisition of voltage and current to provide a guarantee. Figure 5 is based on the SVG ADMC401 and PSD311 device structure. The system is divided into three main parts: The first part is formed by the ADMC401 and PSD311 detection and control, the second part is composed of IGBT inverter module, and the third part is constituted by the power diode full-wave rectifier circuit. Fuji of Japan rectifier three-phase full-wave rectifier 6RI100G-160, whose main role is three-phase AC line voltage into a DC output, in order to maintain the DC voltage across the capacitor, and inverter circuit to provide a stable current. The module can be used without triggering a slight change in the work of the inverter angle of the case to improve and stabilize the system voltage on the capacitor. Inverter circuit part is used Fuji Electric launched R Series IPM module 7MBP100RA-120, it will last IGBT modules, driver and protection circuits being combined in one module, thereby greatly enhancing the stability of the system practical application simplify the design difficulty, reducing the device size. Current detection is the use KT100-P-type current sensor to complete, voltage detection is the use of CHV-50P voltage sensor. Output display part driven by the SED1520 MGLS-12032A LCD module. The function of the above components can be on digital signal processing chip ADMC401 software programming.
By combining ADMC401 and PSD311 can truly only two chips form a powerful, low-cost results of the smallest single chip system, and a wide range of applications, especially for those who require low power, small size, and more peripheral , high-speed applications. This article describes the application of the device in SVG of which involved a lot of features, but the system itself, there is still much room for expansion. When used according to the actual situation of full use of its resources to complete more complex tasks