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Pin Description Of 8085

Published on Jun 18 2014 // General Details of 8085

6. Interrupts and Externally initiated operations:

  • They are the signals initiated by an external device to request the microprocessor to do a particular task or work.
  • There are five hardware interrupts called,

  • On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active low INTA (Interrupt Acknowledge) signal.

Reset In (input, active low)

  • This signal is used to reset the microprocessor.
  • The program counter inside the microprocessor is set to zero.
  • The buses are tri-stated.

Reset Out (Output)

  • It indicates CPU is being reset.
  • Used to reset all the connected devices when the microprocessor is reset.

7. Direct Memory Access (DMA):

Tri state devices:

  • 3 output states are high & low states and additionally a high impedance state.
  • When enable E is high the gate is enabled and the output Q can be 1 or 0 (if A is 0, Q is 1, otherwise Q is 0). However, when E is low the gate is disabled and the output Q enters into a high impedance state.

Fig (a) – Pin Diagram of 8085 & Fig(b) – logical schematic of Pin diagram.

  • For both high and low states, the output Q draws a current from the input of the OR gate.
  • When E is low, Q enters a high impedance state; high impedance means it is electrically isolated from the OR gate’s input, though it is physically connected. Therefore, it does not draw any current from the OR gate’s input.
  • When 2 or more devices are connected to a common bus, to prevent the devices from interfering with each other, the tristate gates are used to disconnect all devices except the one that is communicating at a given instant.
  • The CPU controls the data transfer operation between memory and I/O device. Direct Memory Access operation is used for large volume data transfer between memory and an I/O device directly.
  • The CPU is disabled by tri-stating its buses and the transfer is effected directly by external control circuits.
  • HOLD signal is generated by the DMA controller circuit. On receipt of this signal, the microprocessor acknowledges the request by sending out HLDA signal and leaves out the control of the buses. After the HLDA signal the DMA controller starts the direct transfer of data.

READY (input)

  • Memory and I/O devices will have slower response compared to microprocessors.
  • Before completing the present job such a slow peripheral may not be able to handle further data or control signal from CPU.
  • The processor sets the READY signal after completing the present job to access the data.
  • The microprocessor enters into WAIT state while the READY pin is disabled.

8. Single Bit Serial I/O ports:

  • SID (input)            –  Serial input data line
  • SOD (output)        –  Serial output data line
  • These signals are used for serial communication.