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Published on Oct 22 2009 // 8086 Details

Definition: The meaning of ‘interrupts’ is to break the sequence of operation.While the cpu is executing a program,on ‘interrupt’ breaks the normal sequence of execution of instructions, diverts its execution to some other program called Interrupt Service Routine (ISR).After executing ISR , the control is transferred back again to the main program.Interrupt processing is an alternative to polling.

Need for Interrupt: Interrupts are particularly useful when interfacing I/O devices, that provide or require data at relatively low data transfer rate.

Types of Interrupts: There are two types of Interrupts in 8086. They are:

(i)Hardware Interrupts  and

(ii)Software Interrupts

(i) Hardware Interrupts (External Interrupts). The Intel microprocessors support hardware interrupts through:

  • Two pins that allow interrupt requests, INTR and NMI
  • One pin that acknowledges, INTA, the interrupt requested on INTR.


  • INTR is a maskable hardware interrupt. The interrupt can be enabled/disabled using STI/CLI instructions or using more complicated method of updating the FLAGS register with the help of the POPF instruction.
  • When an interrupt occurs, the processor stores FLAGS register into stack, disables further interrupts, fetches from the bus one byte representing interrupt type, and jumps to interrupt processing routine address of which is stored in location 4 * <interrupt type>. Interrupt processing routine should return with the IRET instruction.
  • NMI is a non-maskable interrupt. Interrupt is processed in the same way as the INTR interrupt. Interrupt type of the NMI is 2, i.e. the address of the NMI processing routine is stored in location 0008h. This interrupt has higher priority than the maskable interrupt.
  • Ex: NMI, INTR.

(ii) Software Interrupts (Internal Interrupts and Instructions) .Software interrupts can be caused by:

  • INT instruction – breakpoint interrupt. This is a type 3 interrupt.
  • INT <interrupt number> instruction – any one interrupt from available 256 interrupts.
  • INTO instruction – interrupt on overflow
  • Single-step interrupt – generated if the TF flag is set. This is a type 1 interrupt. When the CPU processes this interrupt it clears TF flag before calling the interrupt processing routine.
  • Processor exceptions: Divide Error (Type 0), Unused Opcode (type 6) and Escape opcode (type 7).
  • Software interrupt processing is the same as for the hardware interrupts.
  • Ex: INT n (Software Instructions)
  • Control is provided through:
    • IF and TF flag bits
    • IRET and IRETD