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Maximum Mode Interface

Published on Oct 14 2009 // 8086 Details
  • When the 8086 is set for the maximum-mode configuration, it provides signals for implementing a multiprocessor / coprocessor system environment.
  • By multiprocessor environment we mean that one microprocessor exists in the system and that each processor is executing its own program.
  • Usually in this type of system environment, there are some system resources that are common to all processors.They are called as global resources. There are also other resources that are assigned to specific processors. These are known as local or private resources.
  • Coprocessor also means that there is a second processor in the system. In this two processor does not access the bus at the same time. One passes the control of the system bus to the other and then may suspend its operation.
  • In the maximum-mode 8086 system, facilities are provided for implementing allocation of global resources and passing bus control to other microprocessor or coprocessor. 

8288 Bus Controller – Bus Command and Control Signals:

  • 8086 does not directly provide all the signals that are required to control the memory, I/O and interrupt interfaces.
  • Specially the WR, M/IO, DT/R, DEN, ALE and INTA, signals are no longer produced by the 8086. Instead it outputs three status signals S0, S1, S2 prior to the initiation of each bus cycle. This 3- bit bus status code identifies which type of bus cycle is to follow.
  • S2S1S0 are input to the external bus controller device, the bus controller generates the appropriately timed command and control signals.

S2
S1
S0
Indication 8288 Command

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

Interrupt Acknowledge

Read I/O port

Write I/O port

Halt

Instruction Fetch

Read Memory

Write Memory

Passive

INTA

IORC

IOWC , AIOWC

None

MRDC

MRDC

MWTC, AMWC

None

  • The 8288 produces one or two of these eight command signals for each bus cycles. For instance, when the 8086 outputs the code S2S1S0 equals 001, it indicates that an I/O read cycle is to be performed.
  • In the code 111 is output by the 8086, it is signaling that no bus activity is to take place.
  • The control outputs produced by the 8288 are DEN, DT/R and ALE. These 3 signals provide the same functions as those described for the minimum system mode. This set of bus commands and control signals is compatible with the Multibus and industry standard for interfacing microprocessor systems.
  • The output of 8289 are bus arbitration signals:

    Bus busy (BUSY), common bus request (CBRQ), bus priority out (BPRO), bus priority in (BPRN), bus request (BREQ) and bus clock (BCLK).

  • They correspond to the bus exchange signals of the Multibus and are used to lock other processor off the system bus during the execution of an instruction by the 8086.
  • In this way the processor can be assured of uninterrupted access to common system resources such as global memory.
  • Queue Status Signals : Two new signals that are produced by the 8086 in the maximum-mode system are queue status outputs QS0 and QS1. Together they form a 2-bit ueue status code, QS1QS0.
  • Following table shows the four different queue status.  
QS1 QS0 Queue Status
0 (low) 0

Queue Empty. The queue has been reinitialized as a result of the execution of a transfer instruction.

0 1

First Byte. The byte taken from the queue was the first byte of the instruction.

1 0

Queue Empty. The queue has been reinitialized as a result of the execution of a transfer instruction.

1 1

Subsequent Byte. The byte taken from the queue was a subsequent byte of the instruction.

Table – Queue status codes
  • Local Bus Control Signal – Request / Grant Signals: In a maximum mode configuration, the minimum mode HOLD, HLDA interface is also changed. These two are replaced by request/grant lines RQ/ GT0 and RQ/ GT1, respectively. They provide a prioritized bus access mechanism for accessing the local bus.