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Heart rate monitor circuit

Published on Jan 11 2011 // Heart and Pulse Monitoring Circuits


 Heart rate monitor circuit 1

Heart rate is the speed of people’s emotional state, exercise intensity and objective indicator of cardiac function. But most people are very difficult to accurately measure the time and his heart rate values. If the heart rate monitor with me, heart ECG electrodes will be detected by monitoring the signal processing device, the user can at any time that your heart rate changes, changes in heart rate, self-monitoring status.
  Heart rate monitor block diagram shown in Figure 1, by the ECG electrodes, amplifiers, frequency / voltage converter, voltage control gate, composed of the audio oscillator and sounder.

Heart rate monitor circuit 2

Heart rate monitor for heart rate range (60 ~ 160) / min. Circuit by adjusting the relevant components, in the (60 ~ 160) / min within the audible alarm can change the heart rate range. This heart rate range the width of the design center values ± 20% range. If central values such as emphasis on the 100 / exceptionally, the heart rate signal range (80 ~ 120) / min, if the heart rate exceeds this range, the lower limit, the instrument does not sound, if the heart rate in the range of the instrument ECG is the sound issue. And the sound of the beat signal with the same heart beat. If the heart rate is exactly the scope of the center of the instrument preset value, instrument sound frequency signal 2200Hz, then the maximum output volume; if heart rate, and the pitch becomes higher along with the beat and speed up; heart rate, the tone followed the beat goes low and slow. Heart rate or heart rate, the instrument output level is reduced. In this way, users can signal to the beat of the sound, pitch and loudness changes in three areas, the more obvious changes in heart rate to identify their own situation.
  Because to carry the instrument, so the volume is as small as possible in order to save power consumption. The supply voltage of 3V, the quiescent current is 150µA.
  Heart rate monitor  electrical schematic diagram shown in Figure. To facilitate the analysis, the circuit is divided into A, B, C, D four parts. A part of the ECG signal amplifier circuit, picked up by the ECG electrode ECG waveform is shown in Figure 22-3. Which is about the maximum rate of about 1mV, the pulse is called the steepest change in R wave, in addition to relatively slow changes in P affect T wave. Every time there is a heart beat R wave.
  ECG signals from electrodes attached to the human body removed from the two terminals 1,3 (see Figure 22-2) to the input circuit.

RC network of the input back to the route, due to the time constant made smaller, so ECG can be separated in the R wave, and then through integrated operational amplifier (A) amplification, in a point will be able to output a constant amplitude (width slightly change) of the pulse sequence. Integrated operational amplifier circuit high open loop gain, R wave enough to cut the top of the circuit in a saturated state, so get in a square pulse points before and after the edge is very steep, do not need the other pulse shaping.

Heart rate monitor circuit 3

B part of the circuit for the frequency of the voltage conversion circuit date, its function is to use a point count rate circuit output pulse signal into DC voltage, required output voltage from the b point and pulse frequency (ie heart rate) is proportional to complete the frequency / voltage linear conversion.
  The beginning, C3, C4 no charge. Transistor VT1 zero bias, are off. When the first ECG positive pulse arrives, the diode VD is biased conductive, the transistor VT1 anti impartial conduct. Then input pulse directly to the C3, C4 charge. C4 charge while also discharge through R5. As much R5, C4 discharge is slow, so not consider its impact. If the input pulse has a certain width, to ensure the C3, C4 charge. If you ignore the voltage drop across the diode VD, according to the availability of capacitive divider,
  VC3 = C4/C3 + C4Vm · VC4 = C3/C3 + C4Vm,
  Vm is the input pulse amplitude, set Vm = 1.5V, C3 = 1.5µF, C4 = 1.5µF, then
  VC3 = 1.5/1.5 +0.43 × 1.5 = 1.2 (V)
  VC4 = 0.43/1.5 +0.43 × 1.5 = 0.3 (V)
  When the first pulse is over, the diode VD anti impartial conduction, the transistor is biased on-VT1, VT1 on C3 reverse power, until the C3, C4 the voltage is equal (and opposite), VT1 was closed. So when looking into the right side from the input, C3, C4, series voltage is zero, meaning that there is no residual charge on the series capacitor. So once again when the second input pulse, the initial conditions exactly the same as the previous pulse. It can be seen after the second pulse in the past on another charge on C4 0.3V voltage, so the voltage on C4:
  VC4 = 2 × C3/C3 + C4Vm = 0.6V
  So continue, C4 the voltage will be accumulated, if the input n pulses, the
  VC4 = n × C3/C3 + C4Vm
  However, the voltage on C4 is not unlimited increase in C3, while also charging the discharge through R5. If the C4 charge per second and let go by the amount of charge equal to dynamic balance, C4 the voltage is no longer increased. So I finally decided to C4 is not the voltage level on the number of pulses, but the pulse frequency, that is, the number of pulses per second, VC4 = Vm · Rb5 · C3 · f. Not difficult to see from the above equation, the voltage on the capacitor C4 and the input pulse frequency is proportional to.
  Potentiometer RP1 heart rate can be preset range of sound. It actually changes the circuit’s input pulse count rate range of Vm, so regardless of the value of the heart center is the number of electrical pulses, b points are the same output voltage, so the end of the working status of the same class, issued as sound law.
  A in the integrated operational amplifier output pulse, it is also the last stage through resistor R4 to the base of VT3 provides a bias current, so the final stage audio oscillator starts oscillation. When no ECG pulse, VT3 not bias current, the audio oscillator is not oscillating, then the last stage does not consume power. This would ensure that sound the same rhythm and heart rate and can save energy.
  C part of the circuit is a voltage-controlled gate, and its working principle is: b point output voltage is about +1.2 V DC voltage is applied to the gate FET VT2. FET in the circuit acts as a voltage-controlled variable resistor. With the added potential of the gate on the different VE, D, S resistance between RDS change with it. The circuit in Figure, VT2 is in reverse bias condition, the supply voltage minus the b point is the reverse bias voltage values. Since b point voltage electrical pulse and heart rate proportional to the time when the heart rate to a corresponding increase in b point voltage, so the reverse bias decreases. RDS decreases. The RDS for the post-level phase-shift audio oscillator, phase-shifting part of RC networks, so that the audio produced by the end of level oscillation frequency increased (see the principle behind the D section of the specific circuit), the heart rate to speed up the sound generated when the notes are goes high.
  As a long time after the battery voltage will gradually decrease, making a point of the output voltage decreases, b point voltage will be reduced, will measure the result in errors. However, FET VT2 work in reverse bias, when the supply voltage drops at the same time, making the reverse bias decreases VT2, RDS decreases, and its effect on b is equivalent to a certain point voltage compensation. But it can not compensate, in order to ensure accuracy, and when the battery voltage is reduced by 10% after, it should replace the battery.
  D part of the circuit works: This part of the four phase-shifted sinusoidal RC oscillator circuit. RC network at each level of phase-shifted 45 °. This circuit is stable, wave good, make the sound more pleasant. Another advantage is the power supply voltage change has little effect on the oscillation frequency, can make the circuit stable and reliable work.
  Change the phase shift network resistance, the oscillation frequency change. FET VT2 of the D, S RDS equivalent resistance between the level of resistance of phase-shifting network. RDS changes, can control the oscillation frequency, RDS large oscillation frequency is low; R resistance of small oscillation frequency is high, but no matter change into small, when the deviation from the normal value (5.1kO) oscillations are weakened, when R is greater than 20kO , less than 2kO when to stop oscillation.
  Piezoelectric ceramics sounder can be used (plus help tune.)