Abstract: 80C196KC and ADMC401 dual CPU interface circuit diagram, detailing the system design process, and the basic functions of major components and the need to pay attention to the problem do the analysis and description. Finally, static var generator (SVG) device, for example, introduced the dual-CPU system.
With computer control technology development and wide application and control system complexity and real-time requirements of continuous improvement, so many systems require a controller with two or more to achieve the various requirements of the controlled object. Especially in the field of industrial applications, to complete a large number of data acquisition and processing, sending and receiving control signals, and many other features of the system’s operation speed, interface, resources, stability, and cost has a very high demand. Design a practical, reasonable, economical, high-performance control system is the key to successfully put into field operation.
In SVG (SVG) device involves a large number of complex calculations (such as filtering computation, the instantaneous reactive power calculations) and advanced control methods (such as vector control), and many signal acquisition and transmission, making difficult to single CPU meet the system requirements. Therefore, high-integration embedded processors and DSP chips to achieve the dual-CPU system to control the whole system.
1 System Design
1.1 The composition and principle of the system
Dual-CPU system, the schematic diagram shown in Figure 1. System uses two chips 80C196KC and ADMC401 as the core processor. ADMC401 ADI’s DSP-based controller chip is very suitable for industrial applications in high-performance control. The chip integrates a high-speed DSP cores, and its core is a comprehensive set of external control interface, so in a highly integrated environment to quickly achieve control. Intel Corporation 80C196 (KB / KC) is a high performance and low-cost 16-bit microcontroller, the same applies to high-speed peripherals to control and require multiple occasions. CPU run time of two independently stored in different devices in the process, while maintaining mutual coordination. Taking into account the complexity of the system itself, if you use the traditional RAM, ROM and logic separate decoding system wiring devices, will certainly make the whole control circuit is too numerous and caused great difficulties to debug, but also reduces the stability of the system sex. Therefore, the system uses a programmable peripheral interface device system PSD products PSD4235 and PSD311. They are as two CPU’s external expansion devices, and and the CPU as a dual CPU-PSD system (dual-CPU system), shown in Figure 1. Communicate with each other between the two CPU a dual-port RAM (IDT7132), it can be successfully achieved through the data transmission between the two CPU. Management component of the keyboard interface chip with the 82C79. Output to drive display section for the SED1520 chip MGLS-12032A LCD module (LCD). System and added additional serial E2PROM, mainly for the protection of data when power and record parts of the operating parameters. In addition, there WATCHDOG circuit components of the system, UART circuit. Their allocation of resources in the system, function realization of the controller through software programming to complete. The following section will detail the design of the interface circuit and the corresponding work.
80C196KC part of the design
80C196KC chip 16-bit Intel, MCS-96 series of important new members of the microcontroller, is currently the strongest performance of the MCU in one of the products, in various types of automatic control systems, data acquisition systems and advanced intelligent instruments has wide range of applications. 80C196KC chip features are as follows: oscillation frequency of 16MHz, instruction and faster 16-bit multiplication 1.75µs, 32 bit divide 3.0µs; 8 ? A / D channel, you can easily achieve the controlled object more voltage and current sampling; through the CPU’s serial port can be achieved with the communication between the host PC,; Add 100H ~ 1FFH internal RAM, the window in the vertical with a more flexible use; a three-way pulse-width modulation (PWM) output; in 80C196KB added on the basis of Article 5 (KB has increased by 6), so that programming is more convenient; 16-bit multiplexed address data / address lines directly interfaces with PSD, while through the latch, the address can be and data are connected to the dual port RAM, multiple data transmission between the CPU and so on. Detailed performance parameters and features, please refer to the literature ? 1 ~ 2 ?. In the dual-CPU system, 80C196 mainly to complete the function of a keyboard control, display output, data storage, signal transmission and so on. Because of the complexity involved, but also with the many external interfaces, so use a large capacity, multi-port PSD4000 chips with it with, as shown in Figure 2 is the part of the circuit 80C196KC.
Figure 2 80C196KC-PSD4235 interface circuit Click to enlarge
Although the CPU data and address lines connected directly with the PSD, but the dual-port RAM, data and address signals must be separated. Required latch used in Figure 2 omitted. PSD4235 chip is the latest company in 2000 WSI PSD4000 products, it can adapt to a variety of microprocessors. The chip integration of the 4M-bit Flash memory, 16 output micro-unit, 24 input micro units CPLD, decoding PLD, 52 separate configurable I / O ports, JTAG interface, etc, and have support out low-power mode power programmable power management unit. PSD chip’s external address allocation and the interface logic decoding software PSDSOFTTMLITE by the dedicated implementation, specific situation, please reference ? 5 ~ 6 ? or visit www.waferscale.com site for details. After using the PSD greatly simplifies the hardware design, reducing printed circuit board area, improve the stability of the system. MCU control part through the graphical display LCD module MGLS-12032 implementation. The module has a direct and indirect access mode access mode two. The system is based on indirect access methods. Figure 2 shows the circuit is the indirect access mode. The timing display module programming by 80C196. MGLS-12032A LCD module is a two SED1520 cascaded together, one in the main work, one is from work, they control the display screen, respectively, left and right half of the screen. Special attention in the programming and the Chinese characters display in the border region to switch between two pieces of SED1520.
System extends the serial E2PROM external circuit, used to store some of the fixed parameters of the system, using Atmel’s chip AT24C02. It is only through 80C196KC high-speed input and output channels (HIS and HSO) to produce a continuous high-low sequence, can be realized with the data transfer between CPU. From a hardware point of view, the chip does not take up any data bus, the connection is simple and saves a lot of system resources.
1.3 ADMC401 part of the design
ADMC401 chip is a single-chip DSP-based controller, suitable for industrial applications in high-performance control. The chip integrates a 26MIPS (13MHz crystal) fixed-point core ADSP-2171, single instruction execution time of 38.5ns, the coding and ADSP-21xxDSP series are fully compatible. Kernel with a comprehensive set of peripheral control interface in order to quickly achieve a high degree of integrated environment control of the components; it also contains three computational units, two data address generators and a program sequencer. Computing unit which includes an arithmetic logic unit ALU, a multiply / accumulator ? MAC ? and a barrel shifter. The kernel also adds a bit action, square, rounded and global interrupt masking and other instructions. In addition, ADMC401 chip consists of two flexible double-buffer, two-way synchronous serial port. Figure 3 shows the functional block diagram of ADMC401. ADMC401 chips 2K × 24-bit internal program memory RAM, 2K × 24-bit internal program memory ROM, 1K × 16 bit internal data memory RAM, 1 high-performance 8-channel 12-bit ADC ADC system (after it four pairs of input dual-channel simultaneous sampling), a centrosymmetric three-phase 16-bit PWM generator (to produce high accuracy with minimal overhead PWM signal), a flexible and incremental encoder interface unit, 2 to FM auxiliary PWM outputs, 12 I / O digital signal lines, 1 dual-channel event capture system, a 16-bit watchdog timer, two 16-bit internal timer and so on.
Figure 3-chip digital signal processor ADMC401 functional block diagram Click to enlarge
PSD3XX chip also provides a number of applications need all the components and peripherals. For 8051,80196 and 68HC11 microcontrollers such as PSD compatible with the extremely useful. ADMC401 and it is also very effective combination. Taking into account the length of ADMC401 internal procedures and the interface is not as much as 80196 controller (80196 needs to be done to achieve human-machine interface, signal transmission, peripheral device interfaces, etc.), so the use of PSD311 (a minimum of 3 existing price series). ADMC401 chip boot program loaded by two pins MMAP and BMODE produce a variety of different states. If the pin MMAP and BMODE potential are 0, then the ADMC401 work in the so-called EPROM chip bootloader mode, which is called "boot memory" dedicated external storage space will allow the chip and byte-wide EPROM connected, and in the power load from the external memory interface through the program; if pin MMAP and BMODE set for other potential will produce a different boot mode; In addition, the 401 chip has a dedicated active-low signal – Boot Memory Select BMS (Boot Memory Select) simplifies the boot memory interface. These features greatly facilitate the ADMC401 and PSD interface. Figure 4 shows the interface circuit ADMC401 and PSD311 (The figure also includes a number of other peripherals.) Connection with the PSD311 ADMC401 it almost as easy as connecting a standard EPROM. As the bus inside the channel cloth in ADMC401, PSD311 was not the 8 data lines and the D7 ~ D0 ADMC401 connected, but connected with the D15 ~ D8C. Also note that the address of the highest offer by the ADMC401 the D22 line (not in ADMC401 A14 address line). BMS as EPROM’s chip select signal and with the PSD311 the A19 input. A19 in the PSD program will be defined as the chip enable signal. ADMC401 generates read and write strobe active-low, they PSD311 the RD and WR inputs connected. The strobe gating in the transmission of PSD311 for the EPROM and RAM. ADMC401 a 2K × 24-bit internal program memory space. The use of EPROM bootloader mode (MMAP = 0, BMODE = 0), external program through the internal sequencer ADMC401 24-bit command format in accordance with all at once downloaded to its internal program memory space. Of course, the application may be greater than ADMC401 internal program memory space, but the program if the code execution to the back, ADMC401 will automatically reboot. Guided by the eight composed of program memory, 8K bytes per page. In addition to the first byte of an outside every three bytes is a null byte, first byte is the length of the page, in the two adjacent bytes of null bytes in groups of three to be installed contains a into the DSP’s 24-bit internal program memory instructions. That is 2K × 24-bit internal program memory space requires 8K × 8-bit external memory space. Development tools in the ADMC401 has a program memory PROM Splitter utility "SPL21.exe". It is for the user to compute the correct page length, and the agreement under the appropriate byte order for the user program, which greatly facilitates the generation of program code. The generated code can be written PSD311.
Figure 4 ADMC401-PSD311 interface circuit diagram Click to enlarge
2 80C196KC-ADMC401 two systems in the SVG Plant
SVG (Static Var Generator) – SVG is also known as STATCOM (Static Synchronous Compensator), is a flexible AC transmission systems FACTS (Flexible AC Transmission System) technology is an important basis for parts. Although the higher cost of SVG device, but its flexible dynamic regulation characteristics, excellent compensation effect and smaller equipment size are other reactive compensation devices can not be compared. A lot of literature on the principles and the development of SVG devices are introduced. Figure 5 for the two systems SVG device structure.
System is divided into three main sections. The first part is the 80C196KC-ADMC401 two systems consisting of detection and control section. 80196 is mainly responsible for the completion of human-machine interface, and sends signals to upper function. ADMC401 high-speed assembly line-style 8-way A / D sampling port for fast acquisition of voltage and current to provide a guarantee, but also complete Shuzi ADMC401 filter calculation, calculation of reactive power, PWM control signal generation transmission and other functions. The second part is constituted by the IGBT inverter module. SVG is a key component devices that part of the inverter bridge, and ADMC401 integrated 6-channel PWM wave generator dedicated just to provide a flexible control method. In addition, the inverter circuit part is Fuji Electric’s new R-Series IGBT-IPM module 7MBP100RA-120. It will last IGBT modules, driver and protection circuit combined in one module, which greatly improves the stability of the practical application of the system simplifies the design effort, reducing the device size. The third part is constituted by the power diode full-wave rectifier circuit. Fuji of Japan rectifier three-phase full-wave rectifier 6RI100G-160. Mainly on the three-phase AC line voltage into a DC output, in order to maintain the stability of the DC voltage across the capacitor, the inverter circuit to provide a direct current. This avoids the need to slightly change the angle of the inverter trigger work to achieve improved and stable capacitor voltages. Current detection is the use of KT100-P-type current sensor to complete, voltage detection is the use of CHV-50P voltage sensor to complete. The output display section is driven to SED1520 chip MGLS-12032A LCD module. Parts of the above functions are on ADMC401 80C196KC digital signal processing chips and software programming.
Figure 5 SVG device structure Click to enlarge
80C196KC and ADMC401 composed of two systems, a wide range of applications, is ideal for computing capacity, and more peripherals, high-speed applications